Detailed Description

The values here are designed to be passed to various functions in the bcm2835 library.

Macros
#define	HIGH 0x1

#define	LOW 0x0

#define	MIN(a, b) (a < b ? a : b)

#define	BCM2835_CORE_CLK_HZ 250000000

#define	BMC2835_RPI2_DT_FILENAME "/proc/device-tree/soc/ranges"

#define	BCM2835_PERI_BASE 0x20000000

#define	BCM2835_PERI_SIZE 0x01000000

#define	BCM2835_RPI2_PERI_BASE 0x3F000000

#define	BCM2835_RPI4_PERI_BASE 0xFE000000

#define	BCM2835_RPI4_PERI_SIZE 0x01800000

#define	BCM2835_ST_BASE 0x3000

#define	BCM2835_GPIO_PADS 0x100000

#define	BCM2835_CLOCK_BASE 0x101000

#define	BCM2835_GPIO_BASE 0x200000

#define	BCM2835_SPI0_BASE 0x204000

#define	BCM2835_BSC0_BASE 0x205000

#define	BCM2835_GPIO_PWM 0x20C000

#define	BCM2835_AUX_BASE 0x215000

#define	BCM2835_SPI1_BASE 0x215080

#define	BCM2835_SPI2_BASE 0x2150C0

#define	BCM2835_BSC1_BASE 0x804000

#define	BCM2835_PAGE_SIZE (4*1024)

#define	BCM2835_BLOCK_SIZE (4*1024)

#define	BCM2835_GPFSEL0 0x0000

#define	BCM2835_GPFSEL1 0x0004

#define	BCM2835_GPFSEL2 0x0008

#define	BCM2835_GPFSEL3 0x000c

#define	BCM2835_GPFSEL4 0x0010

#define	BCM2835_GPFSEL5 0x0014

#define	BCM2835_GPSET0 0x001c

#define	BCM2835_GPSET1 0x0020

#define	BCM2835_GPCLR0 0x0028

#define	BCM2835_GPCLR1 0x002c

#define	BCM2835_GPLEV0 0x0034

#define	BCM2835_GPLEV1 0x0038

#define	BCM2835_GPEDS0 0x0040

#define	BCM2835_GPEDS1 0x0044

#define	BCM2835_GPREN0 0x004c

#define	BCM2835_GPREN1 0x0050

#define	BCM2835_GPFEN0 0x0058

#define	BCM2835_GPFEN1 0x005c

#define	BCM2835_GPHEN0 0x0064

#define	BCM2835_GPHEN1 0x0068

#define	BCM2835_GPLEN0 0x0070

#define	BCM2835_GPLEN1 0x0074

#define	BCM2835_GPAREN0 0x007c

#define	BCM2835_GPAREN1 0x0080

#define	BCM2835_GPAFEN0 0x0088

#define	BCM2835_GPAFEN1 0x008c

#define	BCM2835_GPPUD 0x0094

#define	BCM2835_GPPUDCLK0 0x0098

#define	BCM2835_GPPUDCLK1 0x009c

#define	BCM2835_GPPUPPDN0 0x00e4 /* Pin pull-up/down for pins 15:0 */

#define	BCM2835_GPPUPPDN1 0x00e8 /* Pin pull-up/down for pins 31:16 */

#define	BCM2835_GPPUPPDN2 0x00ec /* Pin pull-up/down for pins 47:32 */

#define	BCM2835_GPPUPPDN3 0x00f0 /* Pin pull-up/down for pins 57:48 */

#define	BCM2835_GPIO_PUD_ERROR 0x08

#define	BCM2835_PADS_GPIO_0_27 0x002c

#define	BCM2835_PADS_GPIO_28_45 0x0030

#define	BCM2835_PADS_GPIO_46_53 0x0034

#define	BCM2835_PAD_PASSWRD (0x5A << 24)

#define	BCM2835_PAD_SLEW_RATE_UNLIMITED 0x10

#define	BCM2835_PAD_HYSTERESIS_ENABLED 0x08

#define	BCM2835_PAD_DRIVE_2mA 0x00

#define	BCM2835_PAD_DRIVE_4mA 0x01

#define	BCM2835_PAD_DRIVE_6mA 0x02

#define	BCM2835_PAD_DRIVE_8mA 0x03

#define	BCM2835_PAD_DRIVE_10mA 0x04

#define	BCM2835_PAD_DRIVE_12mA 0x05

#define	BCM2835_PAD_DRIVE_14mA 0x06

#define	BCM2835_PAD_DRIVE_16mA 0x07

#define	BCM2835_AUX_IRQ 0x0000

#define	BCM2835_AUX_ENABLE 0x0004

#define	BCM2835_AUX_ENABLE_UART1 0x01

#define	BCM2835_AUX_ENABLE_SPI0 0x02

#define	BCM2835_AUX_ENABLE_SPI1 0x04

#define	BCM2835_AUX_SPI_CNTL0 0x0000

#define	BCM2835_AUX_SPI_CNTL1 0x0004

#define	BCM2835_AUX_SPI_STAT 0x0008

#define	BCM2835_AUX_SPI_PEEK 0x000C

#define	BCM2835_AUX_SPI_IO 0x0020

#define	BCM2835_AUX_SPI_TXHOLD 0x0030

#define	BCM2835_AUX_SPI_CLOCK_MIN 30500

#define	BCM2835_AUX_SPI_CLOCK_MAX 125000000

#define	BCM2835_AUX_SPI_CNTL0_SPEED 0xFFF00000

#define	BCM2835_AUX_SPI_CNTL0_SPEED_MAX 0xFFF

#define	BCM2835_AUX_SPI_CNTL0_SPEED_SHIFT 20

#define	BCM2835_AUX_SPI_CNTL0_CS0_N 0x000C0000

#define	BCM2835_AUX_SPI_CNTL0_CS1_N 0x000A0000

#define	BCM2835_AUX_SPI_CNTL0_CS2_N 0x00060000

#define	BCM2835_AUX_SPI_CNTL0_POSTINPUT 0x00010000

#define	BCM2835_AUX_SPI_CNTL0_VAR_CS 0x00008000

#define	BCM2835_AUX_SPI_CNTL0_VAR_WIDTH 0x00004000

#define	BCM2835_AUX_SPI_CNTL0_DOUTHOLD 0x00003000

#define	BCM2835_AUX_SPI_CNTL0_ENABLE 0x00000800

#define	BCM2835_AUX_SPI_CNTL0_CPHA_IN 0x00000400

#define	BCM2835_AUX_SPI_CNTL0_CLEARFIFO 0x00000200

#define	BCM2835_AUX_SPI_CNTL0_CPHA_OUT 0x00000100

#define	BCM2835_AUX_SPI_CNTL0_CPOL 0x00000080

#define	BCM2835_AUX_SPI_CNTL0_MSBF_OUT 0x00000040

#define	BCM2835_AUX_SPI_CNTL0_SHIFTLEN 0x0000003F

#define	BCM2835_AUX_SPI_CNTL1_CSHIGH 0x00000700

#define	BCM2835_AUX_SPI_CNTL1_IDLE 0x00000080

#define	BCM2835_AUX_SPI_CNTL1_TXEMPTY 0x00000040

#define	BCM2835_AUX_SPI_CNTL1_MSBF_IN 0x00000002

#define	BCM2835_AUX_SPI_CNTL1_KEEP_IN 0x00000001

#define	BCM2835_AUX_SPI_STAT_TX_LVL 0xFF000000

#define	BCM2835_AUX_SPI_STAT_RX_LVL 0x00FF0000

#define	BCM2835_AUX_SPI_STAT_TX_FULL 0x00000400

#define	BCM2835_AUX_SPI_STAT_TX_EMPTY 0x00000200

#define	BCM2835_AUX_SPI_STAT_RX_FULL 0x00000100

#define	BCM2835_AUX_SPI_STAT_RX_EMPTY 0x00000080

#define	BCM2835_AUX_SPI_STAT_BUSY 0x00000040

#define	BCM2835_AUX_SPI_STAT_BITCOUNT 0x0000003F

#define	BCM2835_SPI0_CS 0x0000

#define	BCM2835_SPI0_FIFO 0x0004

#define	BCM2835_SPI0_CLK 0x0008

#define	BCM2835_SPI0_DLEN 0x000c

#define	BCM2835_SPI0_LTOH 0x0010

#define	BCM2835_SPI0_DC 0x0014

#define	BCM2835_SPI0_CS_LEN_LONG 0x02000000

#define	BCM2835_SPI0_CS_DMA_LEN 0x01000000

#define	BCM2835_SPI0_CS_CSPOL2 0x00800000

#define	BCM2835_SPI0_CS_CSPOL1 0x00400000

#define	BCM2835_SPI0_CS_CSPOL0 0x00200000

#define	BCM2835_SPI0_CS_RXF 0x00100000

#define	BCM2835_SPI0_CS_RXR 0x00080000

#define	BCM2835_SPI0_CS_TXD 0x00040000

#define	BCM2835_SPI0_CS_RXD 0x00020000

#define	BCM2835_SPI0_CS_DONE 0x00010000

#define	BCM2835_SPI0_CS_TE_EN 0x00008000

#define	BCM2835_SPI0_CS_LMONO 0x00004000

#define	BCM2835_SPI0_CS_LEN 0x00002000

#define	BCM2835_SPI0_CS_REN 0x00001000

#define	BCM2835_SPI0_CS_ADCS 0x00000800

#define	BCM2835_SPI0_CS_INTR 0x00000400

#define	BCM2835_SPI0_CS_INTD 0x00000200

#define	BCM2835_SPI0_CS_DMAEN 0x00000100

#define	BCM2835_SPI0_CS_TA 0x00000080

#define	BCM2835_SPI0_CS_CSPOL 0x00000040

#define	BCM2835_SPI0_CS_CLEAR 0x00000030

#define	BCM2835_SPI0_CS_CLEAR_RX 0x00000020

#define	BCM2835_SPI0_CS_CLEAR_TX 0x00000010

#define	BCM2835_SPI0_CS_CPOL 0x00000008

#define	BCM2835_SPI0_CS_CPHA 0x00000004

#define	BCM2835_SPI0_CS_CS 0x00000003

#define	BCM2835_BSC_C 0x0000

#define	BCM2835_BSC_S 0x0004

#define	BCM2835_BSC_DLEN 0x0008

#define	BCM2835_BSC_A 0x000c

#define	BCM2835_BSC_FIFO 0x0010

#define	BCM2835_BSC_DIV 0x0014

#define	BCM2835_BSC_DEL 0x0018

#define	BCM2835_BSC_CLKT 0x001c

#define	BCM2835_BSC_C_I2CEN 0x00008000

#define	BCM2835_BSC_C_INTR 0x00000400

#define	BCM2835_BSC_C_INTT 0x00000200

#define	BCM2835_BSC_C_INTD 0x00000100

#define	BCM2835_BSC_C_ST 0x00000080

#define	BCM2835_BSC_C_CLEAR_1 0x00000020

#define	BCM2835_BSC_C_CLEAR_2 0x00000010

#define	BCM2835_BSC_C_READ 0x00000001

#define	BCM2835_BSC_S_CLKT 0x00000200

#define	BCM2835_BSC_S_ERR 0x00000100

#define	BCM2835_BSC_S_RXF 0x00000080

#define	BCM2835_BSC_S_TXE 0x00000040

#define	BCM2835_BSC_S_RXD 0x00000020

#define	BCM2835_BSC_S_TXD 0x00000010

#define	BCM2835_BSC_S_RXR 0x00000008

#define	BCM2835_BSC_S_TXW 0x00000004

#define	BCM2835_BSC_S_DONE 0x00000002

#define	BCM2835_BSC_S_TA 0x00000001

#define	BCM2835_BSC_FIFO_SIZE 16

#define	BCM2835_ST_CS 0x0000

#define	BCM2835_ST_CLO 0x0004

#define	BCM2835_ST_CHI 0x0008

Enumerations
enum	bcm2835RegisterBase { BCM2835_REGBASE_ST = 1, BCM2835_REGBASE_GPIO = 2, BCM2835_REGBASE_PWM = 3, BCM2835_REGBASE_CLK = 4, BCM2835_REGBASE_PADS = 5, BCM2835_REGBASE_SPI0 = 6, BCM2835_REGBASE_BSC0 = 7, BCM2835_REGBASE_BSC1 = 8, BCM2835_REGBASE_AUX = 9, BCM2835_REGBASE_SPI1 = 10 }
	bcm2835RegisterBase Register bases for bcm2835_regbase() More...

enum	bcm2835FunctionSelect { BCM2835_GPIO_FSEL_INPT = 0x00, BCM2835_GPIO_FSEL_OUTP = 0x01, BCM2835_GPIO_FSEL_ALT0 = 0x04, BCM2835_GPIO_FSEL_ALT1 = 0x05, BCM2835_GPIO_FSEL_ALT2 = 0x06, BCM2835_GPIO_FSEL_ALT3 = 0x07, BCM2835_GPIO_FSEL_ALT4 = 0x03, BCM2835_GPIO_FSEL_ALT5 = 0x02, BCM2835_GPIO_FSEL_MASK = 0x07 }
	bcm2835PortFunction Port function select modes for bcm2835_gpio_fsel() More...

enum	bcm2835PUDControl { BCM2835_GPIO_PUD_OFF = 0x00, BCM2835_GPIO_PUD_DOWN = 0x01, BCM2835_GPIO_PUD_UP = 0x02 }
	bcm2835PUDControl Pullup/Pulldown defines for bcm2835_gpio_pud() More...

enum	bcm2835PadGroup { BCM2835_PAD_GROUP_GPIO_0_27 = 0, BCM2835_PAD_GROUP_GPIO_28_45 = 1, BCM2835_PAD_GROUP_GPIO_46_53 = 2 }
	bcm2835PadGroup Pad group specification for bcm2835_gpio_pad() More...

enum	RPiGPIOPin { RPI_GPIO_P1_03 = 0, RPI_GPIO_P1_05 = 1, RPI_GPIO_P1_07 = 4, RPI_GPIO_P1_08 = 14, RPI_GPIO_P1_10 = 15, RPI_GPIO_P1_11 = 17, RPI_GPIO_P1_12 = 18, RPI_GPIO_P1_13 = 21, RPI_GPIO_P1_15 = 22, RPI_GPIO_P1_16 = 23, RPI_GPIO_P1_18 = 24, RPI_GPIO_P1_19 = 10, RPI_GPIO_P1_21 = 9, RPI_GPIO_P1_22 = 25, RPI_GPIO_P1_23 = 11, RPI_GPIO_P1_24 = 8, RPI_GPIO_P1_26 = 7, RPI_V2_GPIO_P1_03 = 2, RPI_V2_GPIO_P1_05 = 3, RPI_V2_GPIO_P1_07 = 4, RPI_V2_GPIO_P1_08 = 14, RPI_V2_GPIO_P1_10 = 15, RPI_V2_GPIO_P1_11 = 17, RPI_V2_GPIO_P1_12 = 18, RPI_V2_GPIO_P1_13 = 27, RPI_V2_GPIO_P1_15 = 22, RPI_V2_GPIO_P1_16 = 23, RPI_V2_GPIO_P1_18 = 24, RPI_V2_GPIO_P1_19 = 10, RPI_V2_GPIO_P1_21 = 9, RPI_V2_GPIO_P1_22 = 25, RPI_V2_GPIO_P1_23 = 11, RPI_V2_GPIO_P1_24 = 8, RPI_V2_GPIO_P1_26 = 7, RPI_V2_GPIO_P1_29 = 5, RPI_V2_GPIO_P1_31 = 6, RPI_V2_GPIO_P1_32 = 12, RPI_V2_GPIO_P1_33 = 13, RPI_V2_GPIO_P1_35 = 19, RPI_V2_GPIO_P1_36 = 16, RPI_V2_GPIO_P1_37 = 26, RPI_V2_GPIO_P1_38 = 20, RPI_V2_GPIO_P1_40 = 21, RPI_V2_GPIO_P5_03 = 28, RPI_V2_GPIO_P5_04 = 29, RPI_V2_GPIO_P5_05 = 30, RPI_V2_GPIO_P5_06 = 31, RPI_BPLUS_GPIO_J8_03 = 2, RPI_BPLUS_GPIO_J8_05 = 3, RPI_BPLUS_GPIO_J8_07 = 4, RPI_BPLUS_GPIO_J8_08 = 14, RPI_BPLUS_GPIO_J8_10 = 15, RPI_BPLUS_GPIO_J8_11 = 17, RPI_BPLUS_GPIO_J8_12 = 18, RPI_BPLUS_GPIO_J8_13 = 27, RPI_BPLUS_GPIO_J8_15 = 22, RPI_BPLUS_GPIO_J8_16 = 23, RPI_BPLUS_GPIO_J8_18 = 24, RPI_BPLUS_GPIO_J8_19 = 10, RPI_BPLUS_GPIO_J8_21 = 9, RPI_BPLUS_GPIO_J8_22 = 25, RPI_BPLUS_GPIO_J8_23 = 11, RPI_BPLUS_GPIO_J8_24 = 8, RPI_BPLUS_GPIO_J8_26 = 7, RPI_BPLUS_GPIO_J8_29 = 5, RPI_BPLUS_GPIO_J8_31 = 6, RPI_BPLUS_GPIO_J8_32 = 12, RPI_BPLUS_GPIO_J8_33 = 13, RPI_BPLUS_GPIO_J8_35 = 19, RPI_BPLUS_GPIO_J8_36 = 16, RPI_BPLUS_GPIO_J8_37 = 26, RPI_BPLUS_GPIO_J8_38 = 20, RPI_BPLUS_GPIO_J8_40 = 21 }
	GPIO Pin Numbers. More...

enum	bcm2835SPIBitOrder { BCM2835_SPI_BIT_ORDER_LSBFIRST = 0, BCM2835_SPI_BIT_ORDER_MSBFIRST = 1 }
	bcm2835SPIBitOrder SPI Bit order Specifies the SPI data bit ordering for bcm2835_spi_setBitOrder() More...

enum	bcm2835SPIMode { BCM2835_SPI_MODE0 = 0, BCM2835_SPI_MODE1 = 1, BCM2835_SPI_MODE2 = 2, BCM2835_SPI_MODE3 = 3 }
	SPI Data mode Specify the SPI data mode to be passed to bcm2835_spi_setDataMode() More...

enum	bcm2835SPIChipSelect { BCM2835_SPI_CS0 = 0, BCM2835_SPI_CS1 = 1, BCM2835_SPI_CS2 = 2, BCM2835_SPI_CS_NONE = 3 }
	bcm2835SPIChipSelect Specify the SPI chip select pin(s) More...

enum	bcm2835SPIClockDivider { BCM2835_SPI_CLOCK_DIVIDER_65536 = 0, BCM2835_SPI_CLOCK_DIVIDER_32768 = 32768, BCM2835_SPI_CLOCK_DIVIDER_16384 = 16384, BCM2835_SPI_CLOCK_DIVIDER_8192 = 8192, BCM2835_SPI_CLOCK_DIVIDER_4096 = 4096, BCM2835_SPI_CLOCK_DIVIDER_2048 = 2048, BCM2835_SPI_CLOCK_DIVIDER_1024 = 1024, BCM2835_SPI_CLOCK_DIVIDER_512 = 512, BCM2835_SPI_CLOCK_DIVIDER_256 = 256, BCM2835_SPI_CLOCK_DIVIDER_128 = 128, BCM2835_SPI_CLOCK_DIVIDER_64 = 64, BCM2835_SPI_CLOCK_DIVIDER_32 = 32, BCM2835_SPI_CLOCK_DIVIDER_16 = 16, BCM2835_SPI_CLOCK_DIVIDER_8 = 8, BCM2835_SPI_CLOCK_DIVIDER_4 = 4, BCM2835_SPI_CLOCK_DIVIDER_2 = 2, BCM2835_SPI_CLOCK_DIVIDER_1 = 1 }
	bcm2835SPIClockDivider Specifies the divider used to generate the SPI clock from the system clock. Figures below give the divider, clock period and clock frequency. Clock divided is based on nominal core clock rate of 250MHz on RPi1 and RPi2, and 400MHz on RPi3. It is reported that (contrary to the documentation) any even divider may used. The frequencies shown for each divider have been confirmed by measurement on RPi1 and RPi2. The system clock frequency on RPi3 is different, so the frequency you get from a given divider will be different. See comments in 'SPI Pins' for information about reliable SPI speeds. Note: it is possible to change the core clock rate of the RPi 3 back to 250MHz, by putting More...

enum	bcm2835I2CClockDivider { BCM2835_I2C_CLOCK_DIVIDER_2500 = 2500, BCM2835_I2C_CLOCK_DIVIDER_626 = 626, BCM2835_I2C_CLOCK_DIVIDER_150 = 150, BCM2835_I2C_CLOCK_DIVIDER_148 = 148 }
	bcm2835I2CClockDivider Specifies the divider used to generate the I2C clock from the system clock. Clock divided is based on nominal base clock rate of 250MHz More...

enum	bcm2835I2CReasonCodes { BCM2835_I2C_REASON_OK = 0x00, BCM2835_I2C_REASON_ERROR_NACK = 0x01, BCM2835_I2C_REASON_ERROR_CLKT = 0x02, BCM2835_I2C_REASON_ERROR_DATA = 0x04 }
	bcm2835I2CReasonCodes Specifies the reason codes for the bcm2835_i2c_write and bcm2835_i2c_read functions. More...

Variables
uint32_t *	bcm2835_peripherals_base

uint32_t	bcm2835_peripherals_size

uint32_t *	bcm2835_peripherals

volatile uint32_t *	bcm2835_st

volatile uint32_t *	bcm2835_gpio

volatile uint32_t *	bcm2835_pwm

volatile uint32_t *	bcm2835_clk

volatile uint32_t *	bcm2835_pads

volatile uint32_t *	bcm2835_spi0

volatile uint32_t *	bcm2835_bsc0

volatile uint32_t *	bcm2835_bsc1

volatile uint32_t *	bcm2835_aux

volatile uint32_t *	bcm2835_spi1

Macro Definition Documentation

◆ BCM2835_AUX_BASE

#define BCM2835_AUX_BASE 0x215000

Base Address of the AUX registers

Definition at line 621 of file bcm2835.h.

◆ BCM2835_AUX_ENABLE_SPI0

#define BCM2835_AUX_ENABLE_SPI0 0x02

SPI0 (SPI1 in the device)

Definition at line 913 of file bcm2835.h.

◆ BCM2835_AUX_ENABLE_SPI1

#define BCM2835_AUX_ENABLE_SPI1 0x04

SPI1 (SPI2 in the device)

Definition at line 914 of file bcm2835.h.

◆ BCM2835_AUX_IRQ

#define BCM2835_AUX_IRQ 0x0000

xxx

Definition at line 909 of file bcm2835.h.

◆ BCM2835_AUX_SPI_CLOCK_MAX

#define BCM2835_AUX_SPI_CLOCK_MAX 125000000

125Mhz

Definition at line 925 of file bcm2835.h.

◆ BCM2835_AUX_SPI_CLOCK_MIN

#define BCM2835_AUX_SPI_CLOCK_MIN 30500

30,5kHz

Definition at line 924 of file bcm2835.h.

◆ BCM2835_AUX_SPI_CNTL0_CS0_N

#define BCM2835_AUX_SPI_CNTL0_CS0_N 0x000C0000

CS 0 low

Definition at line 931 of file bcm2835.h.

◆ BCM2835_AUX_SPI_CNTL0_CS1_N

#define BCM2835_AUX_SPI_CNTL0_CS1_N 0x000A0000

CS 1 low

Definition at line 932 of file bcm2835.h.

◆ BCM2835_AUX_SPI_CNTL0_CS2_N

#define BCM2835_AUX_SPI_CNTL0_CS2_N 0x00060000

CS 2 low

Definition at line 933 of file bcm2835.h.

◆ BCM2835_AUX_SPI_IO

#define BCM2835_AUX_SPI_IO 0x0020

Write = TX, read=RX

Definition at line 921 of file bcm2835.h.

◆ BCM2835_AUX_SPI_PEEK

#define BCM2835_AUX_SPI_PEEK 0x000C

Read but do not take from FF

Definition at line 920 of file bcm2835.h.

◆ BCM2835_AUX_SPI_TXHOLD

#define BCM2835_AUX_SPI_TXHOLD 0x0030

Write = TX keep CS, read=RX

Definition at line 922 of file bcm2835.h.

◆ BCM2835_BLOCK_SIZE

#define BCM2835_BLOCK_SIZE (4*1024)

Size of memory block on RPi

Definition at line 710 of file bcm2835.h.

◆ BCM2835_BSC0_BASE

#define BCM2835_BSC0_BASE 0x205000

Base Address of the BSC0 registers

Definition at line 617 of file bcm2835.h.

◆ BCM2835_BSC1_BASE

#define BCM2835_BSC1_BASE 0x804000

Base Address of the BSC1 registers

Definition at line 627 of file bcm2835.h.

◆ BCM2835_BSC_A

#define BCM2835_BSC_A 0x000c

BSC Master Slave Address

Definition at line 1070 of file bcm2835.h.

◆ BCM2835_BSC_C

#define BCM2835_BSC_C 0x0000

BSC Master Control

Definition at line 1067 of file bcm2835.h.

◆ BCM2835_BSC_C_CLEAR_1

#define BCM2835_BSC_C_CLEAR_1 0x00000020

Clear FIFO Clear

Definition at line 1082 of file bcm2835.h.

◆ BCM2835_BSC_C_CLEAR_2

#define BCM2835_BSC_C_CLEAR_2 0x00000010

Clear FIFO Clear

Definition at line 1083 of file bcm2835.h.

◆ BCM2835_BSC_C_I2CEN

#define BCM2835_BSC_C_I2CEN 0x00008000

I2C Enable, 0 = disabled, 1 = enabled

Definition at line 1077 of file bcm2835.h.

◆ BCM2835_BSC_C_INTD

#define BCM2835_BSC_C_INTD 0x00000100

Interrupt on DONE

Definition at line 1080 of file bcm2835.h.

◆ BCM2835_BSC_C_INTR

#define BCM2835_BSC_C_INTR 0x00000400

Interrupt on RX

Definition at line 1078 of file bcm2835.h.

◆ BCM2835_BSC_C_INTT

#define BCM2835_BSC_C_INTT 0x00000200

Interrupt on TX

Definition at line 1079 of file bcm2835.h.

◆ BCM2835_BSC_C_READ

#define BCM2835_BSC_C_READ 0x00000001

Read transfer

Definition at line 1084 of file bcm2835.h.

◆ BCM2835_BSC_C_ST

#define BCM2835_BSC_C_ST 0x00000080

Start transfer, 1 = Start a new transfer

Definition at line 1081 of file bcm2835.h.

◆ BCM2835_BSC_CLKT

#define BCM2835_BSC_CLKT 0x001c

BSC Master Clock Stretch Timeout

Definition at line 1074 of file bcm2835.h.

◆ BCM2835_BSC_DEL

#define BCM2835_BSC_DEL 0x0018

BSC Master Data Delay

Definition at line 1073 of file bcm2835.h.

◆ BCM2835_BSC_DIV

#define BCM2835_BSC_DIV 0x0014

BSC Master Clock Divider

Definition at line 1072 of file bcm2835.h.

◆ BCM2835_BSC_DLEN

#define BCM2835_BSC_DLEN 0x0008

BSC Master Data Length

Definition at line 1069 of file bcm2835.h.

◆ BCM2835_BSC_FIFO

#define BCM2835_BSC_FIFO 0x0010

BSC Master Data FIFO

Definition at line 1071 of file bcm2835.h.

◆ BCM2835_BSC_FIFO_SIZE

#define BCM2835_BSC_FIFO_SIZE 16

BSC FIFO size

Definition at line 1098 of file bcm2835.h.

◆ BCM2835_BSC_S

#define BCM2835_BSC_S 0x0004

BSC Master Status

Definition at line 1068 of file bcm2835.h.

◆ BCM2835_BSC_S_CLKT

#define BCM2835_BSC_S_CLKT 0x00000200

Clock stretch timeout

Definition at line 1087 of file bcm2835.h.

◆ BCM2835_BSC_S_DONE

#define BCM2835_BSC_S_DONE 0x00000002

Transfer DONE

Definition at line 1095 of file bcm2835.h.

◆ BCM2835_BSC_S_ERR

#define BCM2835_BSC_S_ERR 0x00000100

ACK error

Definition at line 1088 of file bcm2835.h.

◆ BCM2835_BSC_S_RXD

#define BCM2835_BSC_S_RXD 0x00000020

RXD FIFO contains data

Definition at line 1091 of file bcm2835.h.

◆ BCM2835_BSC_S_RXF

#define BCM2835_BSC_S_RXF 0x00000080

RXF FIFO full, 0 = FIFO is not full, 1 = FIFO is full

Definition at line 1089 of file bcm2835.h.

◆ BCM2835_BSC_S_RXR

#define BCM2835_BSC_S_RXR 0x00000008

RXR FIFO needs reading (full)

Definition at line 1093 of file bcm2835.h.

◆ BCM2835_BSC_S_TA

#define BCM2835_BSC_S_TA 0x00000001

Transfer Active

Definition at line 1096 of file bcm2835.h.

◆ BCM2835_BSC_S_TXD

#define BCM2835_BSC_S_TXD 0x00000010

TXD FIFO can accept data

Definition at line 1092 of file bcm2835.h.

◆ BCM2835_BSC_S_TXE

#define BCM2835_BSC_S_TXE 0x00000040

TXE FIFO full, 0 = FIFO is not full, 1 = FIFO is full

Definition at line 1090 of file bcm2835.h.

◆ BCM2835_BSC_S_TXW

#define BCM2835_BSC_S_TXW 0x00000004

TXW FIFO needs writing (full)

Definition at line 1094 of file bcm2835.h.

◆ BCM2835_CLOCK_BASE

#define BCM2835_CLOCK_BASE 0x101000

Base Address of the Clock/timer registers

Definition at line 611 of file bcm2835.h.

◆ BCM2835_CORE_CLK_HZ

#define BCM2835_CORE_CLK_HZ 250000000

Speed of the core clock core_clk 250 MHz

Definition at line 582 of file bcm2835.h.

◆ BCM2835_GPAFEN0

#define BCM2835_GPAFEN0 0x0088

GPIO Pin Async. Falling Edge Detect 0

Definition at line 744 of file bcm2835.h.

◆ BCM2835_GPAFEN1

#define BCM2835_GPAFEN1 0x008c

GPIO Pin Async. Falling Edge Detect 1

Definition at line 745 of file bcm2835.h.

◆ BCM2835_GPAREN0

#define BCM2835_GPAREN0 0x007c

GPIO Pin Async. Rising Edge Detect 0

Definition at line 742 of file bcm2835.h.

◆ BCM2835_GPAREN1

#define BCM2835_GPAREN1 0x0080

GPIO Pin Async. Rising Edge Detect 1

Definition at line 743 of file bcm2835.h.

◆ BCM2835_GPCLR0

#define BCM2835_GPCLR0 0x0028

GPIO Pin Output Clear 0

Definition at line 728 of file bcm2835.h.

◆ BCM2835_GPCLR1

#define BCM2835_GPCLR1 0x002c

GPIO Pin Output Clear 1

Definition at line 729 of file bcm2835.h.

◆ BCM2835_GPEDS0

#define BCM2835_GPEDS0 0x0040

GPIO Pin Event Detect Status 0

Definition at line 732 of file bcm2835.h.

◆ BCM2835_GPEDS1

#define BCM2835_GPEDS1 0x0044

GPIO Pin Event Detect Status 1

Definition at line 733 of file bcm2835.h.

◆ BCM2835_GPFEN0

#define BCM2835_GPFEN0 0x0058

GPIO Pin Falling Edge Detect Enable 0

Definition at line 736 of file bcm2835.h.

◆ BCM2835_GPFEN1

#define BCM2835_GPFEN1 0x005c

GPIO Pin Falling Edge Detect Enable 1

Definition at line 737 of file bcm2835.h.

◆ BCM2835_GPFSEL0

#define BCM2835_GPFSEL0 0x0000

GPIO register offsets from BCM2835_GPIO_BASE. Offsets into the GPIO Peripheral block in bytes per 6.1 Register View GPIO Function Select 0

Definition at line 720 of file bcm2835.h.

◆ BCM2835_GPFSEL1

#define BCM2835_GPFSEL1 0x0004

GPIO Function Select 1

Definition at line 721 of file bcm2835.h.

◆ BCM2835_GPFSEL2

#define BCM2835_GPFSEL2 0x0008

GPIO Function Select 2

Definition at line 722 of file bcm2835.h.

◆ BCM2835_GPFSEL3

#define BCM2835_GPFSEL3 0x000c

GPIO Function Select 3

Definition at line 723 of file bcm2835.h.

◆ BCM2835_GPFSEL4

#define BCM2835_GPFSEL4 0x0010

GPIO Function Select 4

Definition at line 724 of file bcm2835.h.

◆ BCM2835_GPFSEL5

#define BCM2835_GPFSEL5 0x0014

GPIO Function Select 5

Definition at line 725 of file bcm2835.h.

◆ BCM2835_GPHEN0

#define BCM2835_GPHEN0 0x0064

GPIO Pin High Detect Enable 0

Definition at line 738 of file bcm2835.h.

◆ BCM2835_GPHEN1

#define BCM2835_GPHEN1 0x0068

GPIO Pin High Detect Enable 1

Definition at line 739 of file bcm2835.h.

◆ BCM2835_GPIO_BASE

#define BCM2835_GPIO_BASE 0x200000

Base Address of the GPIO registers

Definition at line 613 of file bcm2835.h.

◆ BCM2835_GPIO_PADS

#define BCM2835_GPIO_PADS 0x100000

Base Address of the Pads registers

Definition at line 609 of file bcm2835.h.

◆ BCM2835_GPIO_PWM

#define BCM2835_GPIO_PWM 0x20C000

Base Address of the PWM registers

Definition at line 619 of file bcm2835.h.

◆ BCM2835_GPLEN0

#define BCM2835_GPLEN0 0x0070

GPIO Pin Low Detect Enable 0

Definition at line 740 of file bcm2835.h.

◆ BCM2835_GPLEN1

#define BCM2835_GPLEN1 0x0074

GPIO Pin Low Detect Enable 1

Definition at line 741 of file bcm2835.h.

◆ BCM2835_GPLEV0

#define BCM2835_GPLEV0 0x0034

GPIO Pin Level 0

Definition at line 730 of file bcm2835.h.

◆ BCM2835_GPLEV1

#define BCM2835_GPLEV1 0x0038

GPIO Pin Level 1

Definition at line 731 of file bcm2835.h.

◆ BCM2835_GPPUD

#define BCM2835_GPPUD 0x0094

GPIO Pin Pull-up/down Enable

Definition at line 746 of file bcm2835.h.

◆ BCM2835_GPPUDCLK0

#define BCM2835_GPPUDCLK0 0x0098

GPIO Pin Pull-up/down Enable Clock 0

Definition at line 747 of file bcm2835.h.

◆ BCM2835_GPPUDCLK1

#define BCM2835_GPPUDCLK1 0x009c

GPIO Pin Pull-up/down Enable Clock 1

Definition at line 748 of file bcm2835.h.

◆ BCM2835_GPREN0

#define BCM2835_GPREN0 0x004c

GPIO Pin Rising Edge Detect Enable 0

Definition at line 734 of file bcm2835.h.

◆ BCM2835_GPREN1

#define BCM2835_GPREN1 0x0050

GPIO Pin Rising Edge Detect Enable 1

Definition at line 735 of file bcm2835.h.

◆ BCM2835_GPSET0

#define BCM2835_GPSET0 0x001c

GPIO Pin Output Set 0

Definition at line 726 of file bcm2835.h.

◆ BCM2835_GPSET1

#define BCM2835_GPSET1 0x0020

GPIO Pin Output Set 1

Definition at line 727 of file bcm2835.h.

◆ BCM2835_PAD_DRIVE_10mA

#define BCM2835_PAD_DRIVE_10mA 0x04

10mA drive current

Definition at line 796 of file bcm2835.h.

◆ BCM2835_PAD_DRIVE_12mA

#define BCM2835_PAD_DRIVE_12mA 0x05

12mA drive current

Definition at line 797 of file bcm2835.h.

◆ BCM2835_PAD_DRIVE_14mA

#define BCM2835_PAD_DRIVE_14mA 0x06

14mA drive current

Definition at line 798 of file bcm2835.h.

◆ BCM2835_PAD_DRIVE_16mA

#define BCM2835_PAD_DRIVE_16mA 0x07

16mA drive current

Definition at line 799 of file bcm2835.h.

◆ BCM2835_PAD_DRIVE_2mA

#define BCM2835_PAD_DRIVE_2mA 0x00

2mA drive current

Definition at line 792 of file bcm2835.h.

◆ BCM2835_PAD_DRIVE_4mA

#define BCM2835_PAD_DRIVE_4mA 0x01

4mA drive current

Definition at line 793 of file bcm2835.h.

◆ BCM2835_PAD_DRIVE_6mA

#define BCM2835_PAD_DRIVE_6mA 0x02

6mA drive current

Definition at line 794 of file bcm2835.h.

◆ BCM2835_PAD_DRIVE_8mA

#define BCM2835_PAD_DRIVE_8mA 0x03

8mA drive current

Definition at line 795 of file bcm2835.h.

◆ BCM2835_PAD_HYSTERESIS_ENABLED

#define BCM2835_PAD_HYSTERESIS_ENABLED 0x08

Hysteresis enabled

Definition at line 791 of file bcm2835.h.

◆ BCM2835_PAD_PASSWRD

#define BCM2835_PAD_PASSWRD (0x5A << 24)

Pad Control masks Password to enable setting pad mask

Definition at line 789 of file bcm2835.h.

◆ BCM2835_PAD_SLEW_RATE_UNLIMITED

#define BCM2835_PAD_SLEW_RATE_UNLIMITED 0x10

Slew rate unlimited

Definition at line 790 of file bcm2835.h.

◆ BCM2835_PADS_GPIO_0_27

#define BCM2835_PADS_GPIO_0_27 0x002c

Pad control register offsets from BCM2835_GPIO_PADS Pad control register for pads 0 to 27

Definition at line 784 of file bcm2835.h.

◆ BCM2835_PADS_GPIO_28_45

#define BCM2835_PADS_GPIO_28_45 0x0030

Pad control register for pads 28 to 45

Definition at line 785 of file bcm2835.h.

◆ BCM2835_PADS_GPIO_46_53

#define BCM2835_PADS_GPIO_46_53 0x0034

Pad control register for pads 46 to 53

Definition at line 786 of file bcm2835.h.

◆ BCM2835_PAGE_SIZE

#define BCM2835_PAGE_SIZE (4*1024)

Size of memory page on RPi

Definition at line 708 of file bcm2835.h.

◆ BCM2835_PERI_BASE

#define BCM2835_PERI_BASE 0x20000000

Physical addresses for various peripheral register sets Base Physical Address of the BCM 2835 peripheral registers Note this is different for the RPi2 BCM2836, where this is derived from /proc/device-tree/soc/ranges If /proc/device-tree/soc/ranges exists on a RPi 1 OS, it would be expected to contain the following numbers:

Peripherals block base address on RPi 1

Definition at line 594 of file bcm2835.h.

◆ BCM2835_PERI_SIZE

#define BCM2835_PERI_SIZE 0x01000000

Size of the peripherals block on RPi 1

Definition at line 596 of file bcm2835.h.

◆ BCM2835_RPI2_PERI_BASE

#define BCM2835_RPI2_PERI_BASE 0x3F000000

Alternate base address for RPI 2 / 3

Definition at line 598 of file bcm2835.h.

◆ BCM2835_RPI4_PERI_BASE

#define BCM2835_RPI4_PERI_BASE 0xFE000000

Alternate base address for RPI 4

Definition at line 600 of file bcm2835.h.

◆ BCM2835_RPI4_PERI_SIZE

#define BCM2835_RPI4_PERI_SIZE 0x01800000

Alternate size for RPI 4

Definition at line 602 of file bcm2835.h.

◆ BCM2835_SPI0_BASE

#define BCM2835_SPI0_BASE 0x204000

Base Address of the SPI0 registers

Definition at line 615 of file bcm2835.h.

◆ BCM2835_SPI0_CLK

#define BCM2835_SPI0_CLK 0x0008

SPI Master Clock Divider

Definition at line 968 of file bcm2835.h.

◆ BCM2835_SPI0_CS

#define BCM2835_SPI0_CS 0x0000

SPI Master Control and Status

Definition at line 966 of file bcm2835.h.

◆ BCM2835_SPI0_CS_ADCS

#define BCM2835_SPI0_CS_ADCS 0x00000800

ADCS Automatically Deassert Chip Select

Definition at line 988 of file bcm2835.h.

◆ BCM2835_SPI0_CS_CLEAR

#define BCM2835_SPI0_CS_CLEAR 0x00000030

Clear FIFO Clear RX and TX

Definition at line 994 of file bcm2835.h.

◆ BCM2835_SPI0_CS_CLEAR_RX

#define BCM2835_SPI0_CS_CLEAR_RX 0x00000020

Clear FIFO Clear RX

Definition at line 995 of file bcm2835.h.

◆ BCM2835_SPI0_CS_CLEAR_TX

#define BCM2835_SPI0_CS_CLEAR_TX 0x00000010

Clear FIFO Clear TX

Definition at line 996 of file bcm2835.h.

◆ BCM2835_SPI0_CS_CPHA

#define BCM2835_SPI0_CS_CPHA 0x00000004

Clock Phase

Definition at line 998 of file bcm2835.h.

◆ BCM2835_SPI0_CS_CPOL

#define BCM2835_SPI0_CS_CPOL 0x00000008

Clock Polarity

Definition at line 997 of file bcm2835.h.

◆ BCM2835_SPI0_CS_CS

#define BCM2835_SPI0_CS_CS 0x00000003

Chip Select

Definition at line 999 of file bcm2835.h.

◆ BCM2835_SPI0_CS_CSPOL

#define BCM2835_SPI0_CS_CSPOL 0x00000040

Chip Select Polarity

Definition at line 993 of file bcm2835.h.

◆ BCM2835_SPI0_CS_CSPOL0

#define BCM2835_SPI0_CS_CSPOL0 0x00200000

Chip Select 0 Polarity

Definition at line 978 of file bcm2835.h.

◆ BCM2835_SPI0_CS_CSPOL1

#define BCM2835_SPI0_CS_CSPOL1 0x00400000

Chip Select 1 Polarity

Definition at line 977 of file bcm2835.h.

◆ BCM2835_SPI0_CS_CSPOL2

#define BCM2835_SPI0_CS_CSPOL2 0x00800000

Chip Select 2 Polarity

Definition at line 976 of file bcm2835.h.

◆ BCM2835_SPI0_CS_DMA_LEN

#define BCM2835_SPI0_CS_DMA_LEN 0x01000000

Enable DMA mode in Lossi mode

Definition at line 975 of file bcm2835.h.

◆ BCM2835_SPI0_CS_DMAEN

#define BCM2835_SPI0_CS_DMAEN 0x00000100

DMAEN DMA Enable

Definition at line 991 of file bcm2835.h.

◆ BCM2835_SPI0_CS_DONE

#define BCM2835_SPI0_CS_DONE 0x00010000

Done transfer Done

Definition at line 983 of file bcm2835.h.

◆ BCM2835_SPI0_CS_INTD

#define BCM2835_SPI0_CS_INTD 0x00000200

INTD Interrupt on Done

Definition at line 990 of file bcm2835.h.

◆ BCM2835_SPI0_CS_INTR

#define BCM2835_SPI0_CS_INTR 0x00000400

INTR Interrupt on RXR

Definition at line 989 of file bcm2835.h.

◆ BCM2835_SPI0_CS_LEN

#define BCM2835_SPI0_CS_LEN 0x00002000

LEN LoSSI enable

Definition at line 986 of file bcm2835.h.

◆ BCM2835_SPI0_CS_LEN_LONG

#define BCM2835_SPI0_CS_LEN_LONG 0x02000000

Enable Long data word in Lossi mode if DMA_LEN is set

Definition at line 974 of file bcm2835.h.

◆ BCM2835_SPI0_CS_LMONO

#define BCM2835_SPI0_CS_LMONO 0x00004000

Unused

Definition at line 985 of file bcm2835.h.

◆ BCM2835_SPI0_CS_REN

#define BCM2835_SPI0_CS_REN 0x00001000

REN Read Enable

Definition at line 987 of file bcm2835.h.

◆ BCM2835_SPI0_CS_RXD

#define BCM2835_SPI0_CS_RXD 0x00020000

RXD RX FIFO contains Data

Definition at line 982 of file bcm2835.h.

◆ BCM2835_SPI0_CS_RXF

#define BCM2835_SPI0_CS_RXF 0x00100000

RXF - RX FIFO Full

Definition at line 979 of file bcm2835.h.

◆ BCM2835_SPI0_CS_RXR

#define BCM2835_SPI0_CS_RXR 0x00080000

RXR RX FIFO needs Reading (full)

Definition at line 980 of file bcm2835.h.

◆ BCM2835_SPI0_CS_TA

#define BCM2835_SPI0_CS_TA 0x00000080

Transfer Active

Definition at line 992 of file bcm2835.h.

◆ BCM2835_SPI0_CS_TE_EN

#define BCM2835_SPI0_CS_TE_EN 0x00008000

Unused

Definition at line 984 of file bcm2835.h.

◆ BCM2835_SPI0_CS_TXD

#define BCM2835_SPI0_CS_TXD 0x00040000

TXD TX FIFO can accept Data

Definition at line 981 of file bcm2835.h.

◆ BCM2835_SPI0_DC

#define BCM2835_SPI0_DC 0x0014

SPI DMA DREQ Controls

Definition at line 971 of file bcm2835.h.

◆ BCM2835_SPI0_DLEN

#define BCM2835_SPI0_DLEN 0x000c

SPI Master Data Length

Definition at line 969 of file bcm2835.h.

◆ BCM2835_SPI0_FIFO

#define BCM2835_SPI0_FIFO 0x0004

SPI Master TX and RX FIFOs

Definition at line 967 of file bcm2835.h.

◆ BCM2835_SPI0_LTOH

#define BCM2835_SPI0_LTOH 0x0010

SPI LOSSI mode TOH

Definition at line 970 of file bcm2835.h.

◆ BCM2835_SPI1_BASE

#define BCM2835_SPI1_BASE 0x215080

Base Address of the AUX_SPI1 registers

Definition at line 623 of file bcm2835.h.

◆ BCM2835_SPI2_BASE

#define BCM2835_SPI2_BASE 0x2150C0

Base Address of the AUX_SPI2 registers

Definition at line 625 of file bcm2835.h.

◆ BCM2835_ST_BASE

#define BCM2835_ST_BASE 0x3000

Offsets for the bases of various peripherals within the peripherals block / Base Address of the System Timer registers

Definition at line 607 of file bcm2835.h.

◆ BCM2835_ST_CHI

#define BCM2835_ST_CHI 0x0008

System Timer Counter Upper 32 bits

Definition at line 1134 of file bcm2835.h.

◆ BCM2835_ST_CLO

#define BCM2835_ST_CLO 0x0004

System Timer Counter Lower 32 bits

Definition at line 1133 of file bcm2835.h.

◆ BCM2835_ST_CS

#define BCM2835_ST_CS 0x0000

System Timer Control/Status

Definition at line 1132 of file bcm2835.h.

◆ BMC2835_RPI2_DT_FILENAME

#define BMC2835_RPI2_DT_FILENAME "/proc/device-tree/soc/ranges"

On all recent OSs, the base of the peripherals is read from a /proc file

Definition at line 585 of file bcm2835.h.

◆ HIGH

#define HIGH 0x1

This means pin HIGH, true, 3.3volts on a pin.

Definition at line 572 of file bcm2835.h.

◆ LOW

#define LOW 0x0

This means pin LOW, false, 0volts on a pin.

Definition at line 574 of file bcm2835.h.

◆ MIN

#define MIN	(	a,
		b
	)	(a < b ? a : b)

Return the minimum of 2 numbers

Definition at line 578 of file bcm2835.h.

Enumeration Type Documentation

◆ bcm2835FunctionSelect

enum bcm2835FunctionSelect

bcm2835PortFunction Port function select modes for bcm2835_gpio_fsel()

Enumerator
BCM2835_GPIO_FSEL_INPT	Input 0b000
BCM2835_GPIO_FSEL_OUTP	Output 0b001
BCM2835_GPIO_FSEL_ALT0	Alternate function 0 0b100
BCM2835_GPIO_FSEL_ALT1	Alternate function 1 0b101
BCM2835_GPIO_FSEL_ALT2	Alternate function 2 0b110,
BCM2835_GPIO_FSEL_ALT3	Alternate function 3 0b111
BCM2835_GPIO_FSEL_ALT4	Alternate function 4 0b011
BCM2835_GPIO_FSEL_ALT5	Alternate function 5 0b010
BCM2835_GPIO_FSEL_MASK	Function select bits mask 0b111

Definition at line 759 of file bcm2835.h.

◆ bcm2835I2CClockDivider

enum bcm2835I2CClockDivider

bcm2835I2CClockDivider Specifies the divider used to generate the I2C clock from the system clock. Clock divided is based on nominal base clock rate of 250MHz

Enumerator
BCM2835_I2C_CLOCK_DIVIDER_2500	2500 = 10us = 100 kHz
BCM2835_I2C_CLOCK_DIVIDER_626	622 = 2.504us = 399.3610 kHz
BCM2835_I2C_CLOCK_DIVIDER_150	150 = 60ns = 1.666 MHz (default at reset)
BCM2835_I2C_CLOCK_DIVIDER_148	148 = 59ns = 1.689 MHz

Definition at line 1104 of file bcm2835.h.

◆ bcm2835I2CReasonCodes

enum bcm2835I2CReasonCodes

bcm2835I2CReasonCodes Specifies the reason codes for the bcm2835_i2c_write and bcm2835_i2c_read functions.

Enumerator
BCM2835_I2C_REASON_OK	Success
BCM2835_I2C_REASON_ERROR_NACK	Received a NACK
BCM2835_I2C_REASON_ERROR_CLKT	Received Clock Stretch Timeout
BCM2835_I2C_REASON_ERROR_DATA	Not all data is sent / received

Definition at line 1114 of file bcm2835.h.

◆ bcm2835PadGroup

enum bcm2835PadGroup

bcm2835PadGroup Pad group specification for bcm2835_gpio_pad()

Enumerator
BCM2835_PAD_GROUP_GPIO_0_27	Pad group for GPIO pads 0 to 27
BCM2835_PAD_GROUP_GPIO_28_45	Pad group for GPIO pads 28 to 45
BCM2835_PAD_GROUP_GPIO_46_53	Pad group for GPIO pads 46 to 53

Definition at line 804 of file bcm2835.h.

◆ bcm2835PUDControl

enum bcm2835PUDControl

bcm2835PUDControl Pullup/Pulldown defines for bcm2835_gpio_pud()

Enumerator
BCM2835_GPIO_PUD_OFF	Off ? disable pull-up/down 0b00
BCM2835_GPIO_PUD_DOWN	Enable Pull Down control 0b01
BCM2835_GPIO_PUD_UP	Enable Pull Up control 0b10

Definition at line 774 of file bcm2835.h.

◆ bcm2835RegisterBase

enum bcm2835RegisterBase

bcm2835RegisterBase Register bases for bcm2835_regbase()

Enumerator
BCM2835_REGBASE_ST	Base of the ST (System Timer) registers.
BCM2835_REGBASE_GPIO	Base of the GPIO registers.
BCM2835_REGBASE_PWM	Base of the PWM registers.
BCM2835_REGBASE_CLK	Base of the CLK registers.
BCM2835_REGBASE_PADS	Base of the PADS registers.
BCM2835_REGBASE_SPI0	Base of the SPI0 registers.
BCM2835_REGBASE_BSC0	Base of the BSC0 registers.
BCM2835_REGBASE_BSC1	Base of the BSC1 registers.
BCM2835_REGBASE_AUX	Base of the AUX registers.
BCM2835_REGBASE_SPI1	Base of the SPI1 registers.

Definition at line 694 of file bcm2835.h.

◆ bcm2835SPIBitOrder

enum bcm2835SPIBitOrder

bcm2835SPIBitOrder SPI Bit order Specifies the SPI data bit ordering for bcm2835_spi_setBitOrder()

Enumerator
BCM2835_SPI_BIT_ORDER_LSBFIRST	LSB First
BCM2835_SPI_BIT_ORDER_MSBFIRST	MSB First

Definition at line 1004 of file bcm2835.h.

◆ bcm2835SPIChipSelect

enum bcm2835SPIChipSelect

bcm2835SPIChipSelect Specify the SPI chip select pin(s)

Enumerator
BCM2835_SPI_CS0	Chip Select 0
BCM2835_SPI_CS1	Chip Select 1
BCM2835_SPI_CS2	Chip Select 2 (ie pins CS1 and CS2 are asserted)
BCM2835_SPI_CS_NONE	No CS, control it yourself

Definition at line 1022 of file bcm2835.h.

◆ bcm2835SPIClockDivider

enum bcm2835SPIClockDivider

bcm2835SPIClockDivider Specifies the divider used to generate the SPI clock from the system clock. Figures below give the divider, clock period and clock frequency. Clock divided is based on nominal core clock rate of 250MHz on RPi1 and RPi2, and 400MHz on RPi3. It is reported that (contrary to the documentation) any even divider may used. The frequencies shown for each divider have been confirmed by measurement on RPi1 and RPi2. The system clock frequency on RPi3 is different, so the frequency you get from a given divider will be different. See comments in 'SPI Pins' for information about reliable SPI speeds. Note: it is possible to change the core clock rate of the RPi 3 back to 250MHz, by putting

core_freq=250

in the config.txt

Enumerator
BCM2835_SPI_CLOCK_DIVIDER_65536	65536 = 3.814697260kHz on Rpi2, 6.1035156kHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_32768	32768 = 7.629394531kHz on Rpi2, 12.20703125kHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_16384	16384 = 15.25878906kHz on Rpi2, 24.4140625kHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_8192	8192 = 30.51757813kHz on Rpi2, 48.828125kHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_4096	4096 = 61.03515625kHz on Rpi2, 97.65625kHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_2048	2048 = 122.0703125kHz on Rpi2, 195.3125kHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_1024	1024 = 244.140625kHz on Rpi2, 390.625kHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_512	512 = 488.28125kHz on Rpi2, 781.25kHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_256	256 = 976.5625kHz on Rpi2, 1.5625MHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_128	128 = 1.953125MHz on Rpi2, 3.125MHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_64	64 = 3.90625MHz on Rpi2, 6.250MHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_32	32 = 7.8125MHz on Rpi2, 12.5MHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_16	16 = 15.625MHz on Rpi2, 25MHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_8	8 = 31.25MHz on Rpi2, 50MHz on RPI3
BCM2835_SPI_CLOCK_DIVIDER_4	4 = 62.5MHz on Rpi2, 100MHz on RPI3. Dont expect this speed to work reliably.
BCM2835_SPI_CLOCK_DIVIDER_2	2 = 125MHz on Rpi2, 200MHz on RPI3, fastest you can get. Dont expect this speed to work reliably.
BCM2835_SPI_CLOCK_DIVIDER_1	1 = 3.814697260kHz on Rpi2, 6.1035156kHz on RPI3, same as 0/65536

Definition at line 1043 of file bcm2835.h.

◆ bcm2835SPIMode

enum bcm2835SPIMode

SPI Data mode Specify the SPI data mode to be passed to bcm2835_spi_setDataMode()

Enumerator
BCM2835_SPI_MODE0	CPOL = 0, CPHA = 0
BCM2835_SPI_MODE1	CPOL = 0, CPHA = 1
BCM2835_SPI_MODE2	CPOL = 1, CPHA = 0
BCM2835_SPI_MODE3	CPOL = 1, CPHA = 1

Definition at line 1012 of file bcm2835.h.

◆ RPiGPIOPin

enum RPiGPIOPin

GPIO Pin Numbers.

Here we define Raspberry Pin GPIO pins on P1 in terms of the underlying BCM GPIO pin numbers. These can be passed as a pin number to any function requiring a pin. Not all pins on the RPi 26 bin IDE plug are connected to GPIO pins and some can adopt an alternate function. RPi version 2 has some slightly different pinouts, and these are values RPI_V2_*. RPi B+ has yet differnet pinouts and these are defined in RPI_BPLUS_*. At bootup, pins 8 and 10 are set to UART0_TXD, UART0_RXD (ie the alt0 function) respectively When SPI0 is in use (ie after bcm2835_spi_begin()), SPI0 pins are dedicated to SPI and cant be controlled independently. If you are using the RPi Compute Module, just use the GPIO number: there is no need to use one of these symbolic names

Enumerator
RPI_GPIO_P1_03	Version 1, Pin P1-03
RPI_GPIO_P1_05	Version 1, Pin P1-05
RPI_GPIO_P1_07	Version 1, Pin P1-07
RPI_GPIO_P1_08	Version 1, Pin P1-08, defaults to alt function 0 UART0_TXD
RPI_GPIO_P1_10	Version 1, Pin P1-10, defaults to alt function 0 UART0_RXD
RPI_GPIO_P1_11	Version 1, Pin P1-11
RPI_GPIO_P1_12	Version 1, Pin P1-12, can be PWM channel 0 in ALT FUN 5
RPI_GPIO_P1_13	Version 1, Pin P1-13
RPI_GPIO_P1_15	Version 1, Pin P1-15
RPI_GPIO_P1_16	Version 1, Pin P1-16
RPI_GPIO_P1_18	Version 1, Pin P1-18
RPI_GPIO_P1_19	Version 1, Pin P1-19, MOSI when SPI0 in use
RPI_GPIO_P1_21	Version 1, Pin P1-21, MISO when SPI0 in use
RPI_GPIO_P1_22	Version 1, Pin P1-22
RPI_GPIO_P1_23	Version 1, Pin P1-23, CLK when SPI0 in use
RPI_GPIO_P1_24	Version 1, Pin P1-24, CE0 when SPI0 in use
RPI_GPIO_P1_26	Version 1, Pin P1-26, CE1 when SPI0 in use
RPI_V2_GPIO_P1_03	Version 2, Pin P1-03
RPI_V2_GPIO_P1_05	Version 2, Pin P1-05
RPI_V2_GPIO_P1_07	Version 2, Pin P1-07
RPI_V2_GPIO_P1_08	Version 2, Pin P1-08, defaults to alt function 0 UART0_TXD
RPI_V2_GPIO_P1_10	Version 2, Pin P1-10, defaults to alt function 0 UART0_RXD
RPI_V2_GPIO_P1_11	Version 2, Pin P1-11
RPI_V2_GPIO_P1_12	Version 2, Pin P1-12, can be PWM channel 0 in ALT FUN 5
RPI_V2_GPIO_P1_13	Version 2, Pin P1-13
RPI_V2_GPIO_P1_15	Version 2, Pin P1-15
RPI_V2_GPIO_P1_16	Version 2, Pin P1-16
RPI_V2_GPIO_P1_18	Version 2, Pin P1-18
RPI_V2_GPIO_P1_19	Version 2, Pin P1-19, MOSI when SPI0 in use
RPI_V2_GPIO_P1_21	Version 2, Pin P1-21, MISO when SPI0 in use
RPI_V2_GPIO_P1_22	Version 2, Pin P1-22
RPI_V2_GPIO_P1_23	Version 2, Pin P1-23, CLK when SPI0 in use
RPI_V2_GPIO_P1_24	Version 2, Pin P1-24, CE0 when SPI0 in use
RPI_V2_GPIO_P1_26	Version 2, Pin P1-26, CE1 when SPI0 in use
RPI_V2_GPIO_P1_29	Version 2, Pin P1-29
RPI_V2_GPIO_P1_31	Version 2, Pin P1-31
RPI_V2_GPIO_P1_32	Version 2, Pin P1-32
RPI_V2_GPIO_P1_33	Version 2, Pin P1-33
RPI_V2_GPIO_P1_35	Version 2, Pin P1-35, can be PWM channel 1 in ALT FUN 5
RPI_V2_GPIO_P1_36	Version 2, Pin P1-36
RPI_V2_GPIO_P1_37	Version 2, Pin P1-37
RPI_V2_GPIO_P1_38	Version 2, Pin P1-38
RPI_V2_GPIO_P1_40	Version 2, Pin P1-40
RPI_V2_GPIO_P5_03	Version 2, Pin P5-03
RPI_V2_GPIO_P5_04	Version 2, Pin P5-04
RPI_V2_GPIO_P5_05	Version 2, Pin P5-05
RPI_V2_GPIO_P5_06	Version 2, Pin P5-06
RPI_BPLUS_GPIO_J8_03	B+, Pin J8-03
RPI_BPLUS_GPIO_J8_05	B+, Pin J8-05
RPI_BPLUS_GPIO_J8_07	B+, Pin J8-07
RPI_BPLUS_GPIO_J8_08	B+, Pin J8-08, defaults to alt function 0 UART0_TXD
RPI_BPLUS_GPIO_J8_10	B+, Pin J8-10, defaults to alt function 0 UART0_RXD
RPI_BPLUS_GPIO_J8_11	B+, Pin J8-11
RPI_BPLUS_GPIO_J8_12	B+, Pin J8-12, can be PWM channel 0 in ALT FUN 5
RPI_BPLUS_GPIO_J8_13	B+, Pin J8-13
RPI_BPLUS_GPIO_J8_15	B+, Pin J8-15
RPI_BPLUS_GPIO_J8_16	B+, Pin J8-16
RPI_BPLUS_GPIO_J8_18	B+, Pin J8-18
RPI_BPLUS_GPIO_J8_19	B+, Pin J8-19, MOSI when SPI0 in use
RPI_BPLUS_GPIO_J8_21	B+, Pin J8-21, MISO when SPI0 in use
RPI_BPLUS_GPIO_J8_22	B+, Pin J8-22
RPI_BPLUS_GPIO_J8_23	B+, Pin J8-23, CLK when SPI0 in use
RPI_BPLUS_GPIO_J8_24	B+, Pin J8-24, CE0 when SPI0 in use
RPI_BPLUS_GPIO_J8_26	B+, Pin J8-26, CE1 when SPI0 in use
RPI_BPLUS_GPIO_J8_29	B+, Pin J8-29,
RPI_BPLUS_GPIO_J8_31	B+, Pin J8-31,
RPI_BPLUS_GPIO_J8_32	B+, Pin J8-32,
RPI_BPLUS_GPIO_J8_33	B+, Pin J8-33,
RPI_BPLUS_GPIO_J8_35	B+, Pin J8-35, can be PWM channel 1 in ALT FUN 5
RPI_BPLUS_GPIO_J8_36	B+, Pin J8-36,
RPI_BPLUS_GPIO_J8_37	B+, Pin J8-37,
RPI_BPLUS_GPIO_J8_38	B+, Pin J8-38,
RPI_BPLUS_GPIO_J8_40	B+, Pin J8-40,

Definition at line 824 of file bcm2835.h.

Variable Documentation

◆ bcm2835_aux

volatile uint32_t* bcm2835_aux

Base of the AUX registers. Available after bcm2835_init has been called (as root)

◆ bcm2835_bsc0

volatile uint32_t* bcm2835_bsc0

Base of the BSC0 registers. Available after bcm2835_init has been called (as root)

◆ bcm2835_bsc1

volatile uint32_t* bcm2835_bsc1

Base of the BSC1 registers. Available after bcm2835_init has been called (as root)

◆ bcm2835_clk

volatile uint32_t* bcm2835_clk

Base of the CLK registers. Available after bcm2835_init has been called (as root)

◆ bcm2835_gpio

volatile uint32_t* bcm2835_gpio

Base of the GPIO registers. Available after bcm2835_init has been called

◆ bcm2835_pads

volatile uint32_t* bcm2835_pads

Base of the PADS registers. Available after bcm2835_init has been called (as root)

◆ bcm2835_peripherals

uint32_t* bcm2835_peripherals

Virtual memory address of the mapped peripherals block

◆ bcm2835_peripherals_base

uint32_t* bcm2835_peripherals_base

Physical address and size of the peripherals block May be overridden on RPi2

◆ bcm2835_peripherals_size

uint32_t bcm2835_peripherals_size

Size of the peripherals block to be mapped

◆ bcm2835_pwm

volatile uint32_t* bcm2835_pwm

Base of the PWM registers. Available after bcm2835_init has been called (as root)

◆ bcm2835_spi0

volatile uint32_t* bcm2835_spi0

Base of the SPI0 registers. Available after bcm2835_init has been called (as root)

◆ bcm2835_spi1

volatile uint32_t* bcm2835_spi1

Base of the SPI1 registers. Available after bcm2835_init has been called (as root)

◆ bcm2835_st

volatile uint32_t* bcm2835_st

Base of the ST (System Timer) registers. Available after bcm2835_init has been called (as root)